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DSP - technologies for signal processors DSP - technologies for programmable devices Telecommunication modules in programmable devices E1 tranceiver (G.703/G.704) HDLC protocol controller Fully programmable digital phase loops (with fully programmable parameters) ATM/B-ISDN: transceiver G.804 cells ATM/B-ISDN: cell-based transceiver I.432.1 cells Plesiochronous 4xE1 multiplex/demultiplex STANAG 4206 EUROCOM/D1 transceiver Embedded applications	Plesiochronous 4xE1 multiplexer/demultiplexer Implementation of plesiochronous multiplexer/demultiplexer of four E1 lines (2048 kbit/s) in a single E2 line (8448 kbit/s) including:    • HDB-3 line code codec (for E1 i E2 electric interfaces)    • CMI codec (for optical E1 i E2 interfaces) as option    • E1, E2 clock recovery modules    • Jitter filters with XDPLL digital phase loop    • E2/G.742 framer    • E2/G.742 frame synchronization module    • Multiplexer 4xE1⇒E2, G.742 ITU compatible    • Demultiplexer E2⇒4xE1 G.742 ITU compatible    • Fully synchronous implementation Block diagram Description     Complete multiplexer/demultiplexer module, uses E1 transceiver module and digital phase loop modules. The module needes only electric (or optical as option) interfaces conected, to become fully operational. The module hase conrol outputs (control[] ), diagnostic outputs (diagnostic[] ) as parallel buses (for example to connect them to LED indicators) or serial (for communication with host uProcessor).